In this work, we consider high-rate error-control systems based on block-wise concatenated Bose-Chaudhuri-Hocquenghem (BC-BCH) codes with iterative hard-decision decoding (IHDD) for storage devices using multi-level per cell (MLC) NAND flash memories. In particular, we propose a novel design rule of BC-BCH codes which consists of quasi-primitive BCH codes and block-wise concatenation of the constituent codes. Comprehensive performance comparisons are carried out among error-control systems with various coding schemes such as BCBCH codes and LDPC codes.