DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Bum-Kyum | ko |
dc.contributor.author | Im, Donggu | ko |
dc.contributor.author | Choi, Jaeyoung | ko |
dc.contributor.author | Lee, Kwyro | ko |
dc.date.accessioned | 2014-09-01T08:38:56Z | - |
dc.date.available | 2014-09-01T08:38:56Z | - |
dc.date.created | 2014-07-17 | - |
dc.date.created | 2014-07-17 | - |
dc.date.issued | 2014-06 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.6, pp.1286 - 1302 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/189637 | - |
dc.description.abstract | A highly linear LNA is implemented in a 0.18 mu m SOI CMOS process for 1 GHz SAW-less receiver applications. To achieve lower noise figure (NF) than conventional simultaneous noise and input matching methods, a capacitive loading based simultaneous noise and input matching technique reducing the NF degradation coming from a lossy gate inductor has been devised. In addition, in order to improve both the 1 dB gain compression point (CP1dB) and the third-order intercept point (IP3) without sacrificing NF, a large-signal transconductance linearization method adopting body-bias control and complementary-superposition is proposed. The proposed LNA shows a measured input-referred CP1dB of 3 dBm, 1 dB desensitization point (B1dB) of 0 dBm and IB (in-band)-IIP3 of 22 dBm with gain of 10.7 dB and NF of 1.3 dB at 1 GHz while driving a 50 Omega load impedance. It draws 20 mA with a buffer stage from a 2.5 V supply voltage. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | WIRELESS RECEIVERS | - |
dc.subject | LNA | - |
dc.title | A Highly Linear 1 GHz 1.3 dB NF CMOS Low-Noise Amplifier With Complementary Transconductance Linearization | - |
dc.type | Article | - |
dc.identifier.wosid | 000337121900001 | - |
dc.identifier.scopusid | 2-s2.0-84902074262 | - |
dc.type.rims | ART | - |
dc.citation.volume | 49 | - |
dc.citation.issue | 6 | - |
dc.citation.beginningpage | 1286 | - |
dc.citation.endingpage | 1302 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.identifier.doi | 10.1109/JSSC.2014.2319262 | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Lee, Kwyro | - |
dc.contributor.nonIdAuthor | Im, Donggu | - |
dc.contributor.nonIdAuthor | Choi, Jaeyoung | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Blocker | - |
dc.subject.keywordAuthor | CMOS | - |
dc.subject.keywordAuthor | high linearity | - |
dc.subject.keywordAuthor | intermodulation distortion | - |
dc.subject.keywordAuthor | large signal | - |
dc.subject.keywordAuthor | MGTR | - |
dc.subject.keywordAuthor | noise figure | - |
dc.subject.keywordAuthor | noise matching | - |
dc.subject.keywordAuthor | non-linearity | - |
dc.subject.keywordAuthor | SAW-less | - |
dc.subject.keywordAuthor | simultaneous matching | - |
dc.subject.keywordPlus | WIRELESS RECEIVERS | - |
dc.subject.keywordPlus | LNA | - |
dc.subject.keywordPlus | DISTORTION | - |
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