DC Field | Value | Language |
---|---|---|
dc.contributor.author | Lee, Dae-Hee | ko |
dc.contributor.author | Cho, Min-Sik | ko |
dc.contributor.author | Kang, Dong-Uk | ko |
dc.contributor.author | Kim, Myung-Soo | ko |
dc.contributor.author | Kim, Hyean Dock | ko |
dc.contributor.author | Cho, Gyuseong | ko |
dc.date.accessioned | 2014-09-01T07:20:54Z | - |
dc.date.available | 2014-09-01T07:20:54Z | - |
dc.date.created | 2014-04-28 | - |
dc.date.created | 2014-04-28 | - |
dc.date.issued | 2014-02 | - |
dc.identifier.citation | JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.64, no.4, pp.510 - 515 | - |
dc.identifier.issn | 0374-4884 | - |
dc.identifier.uri | http://hdl.handle.net/10203/189232 | - |
dc.description.abstract | The single-slope analog-to-digital converter (SS-ADC) is the most commonly used column-level ADC for high-speed industrial, complementary metal-oxide semiconductor (CMOS)-based X-ray image sensors because of its small chip area (the width of a pixel), its simple circuit structure, and its low power consumption. However, it generally has a long conversion time, so we propose an innovative design: a complimentary dual-slope ADC (CDS-ADC) that uses two opposite ramp signals instead of a single ramp to double the conversion speed. This CDS-ADC occupies only 15% more area than the original SS-ADC. A prototype 12-bit CDS-ADC and a 12-bit SS-ADC were fabricated using a 0.35-A mu m 1P 4M CMOS process. During comparison of the two, the measured maximum differential non-linearity (DNL) of the CDS-ADC was a 0.49 least significant bit (LSB), the maximum integral non-linearity (INL) was a 0.43 LSB, the effective number of bits (ENOB) was 9.18 bits, and the figure of merit (FOM) was 0.03 pJ/conversion. The total power consumption was 0.031 uW. The conversion time of the new CDS-ADC was half that of the SS-ADC. The proposed dual-slope concept can be extended to further multiply the conversion speed by using multiple pairs of dual-slope ramps. | - |
dc.language | English | - |
dc.publisher | KOREAN PHYSICAL SOC | - |
dc.subject | SENSOR | - |
dc.title | A complementary dual-slope ADC with high frame rate and wide input range for fast X-ray imaging | - |
dc.type | Article | - |
dc.identifier.wosid | 000333212300004 | - |
dc.identifier.scopusid | 2-s2.0-84897833208 | - |
dc.type.rims | ART | - |
dc.citation.volume | 64 | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 510 | - |
dc.citation.endingpage | 515 | - |
dc.citation.publicationname | JOURNAL OF THE KOREAN PHYSICAL SOCIETY | - |
dc.identifier.doi | 10.3938/jkps.64.510 | - |
dc.contributor.localauthor | Cho, Gyuseong | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Industrial NDT | - |
dc.subject.keywordAuthor | Integration ADC | - |
dc.subject.keywordAuthor | High frame-rate | - |
dc.subject.keywordAuthor | Wide-input CMOS image sensor | - |
dc.subject.keywordAuthor | X-ray image sensor | - |
dc.subject.keywordPlus | SENSOR | - |
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