Folded Circuit Synthesis: Logic Simplification Using Dual Edge-Triggered Flip-Flops

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Publisher
IEEE
Issue Date
2013-05-30
Language
English
Citation

IEEE International Conference on Integrated Circuit Design and Technology (ICICDT), pp.17 - 20

DOI
10.1109/ICICDT.2013.6563293
URI
http://hdl.handle.net/10203/188018
Appears in Collection
EE-Conference Papers(학술회의논문)
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