Interposer Power Distribution Network (PDN) Modeling Using a Segmentation Method for 3-D ICs With TSVs

Abstract

In this paper, we propose models for large-sized silicon interposer power distribution networks (PDNs) and through silicon via (TSV)-based stacked grid-type PDNs using a segmentation method. We model the PDNs as distributed scalable resistance (R), inductance (L), conductance (G), and capacitance (C)-lumped models for an accurate estimation of the PDN impedance, including PDN inductance and wave phenomena such as the mode resonance at the high end of the frequency range. For this estimation, it is necessary to accurately model all transmission line (TL) sections that form the PDNs using a conformal mapping method and a phenomenological loss equivalence method (PEM). After modeling the individual TL sections, all the TL sections are connected based on a segmentation method, which is a matrix calculation method. The segmentation method accelerates the calculation speed for the PDN impedance estimation. The proposed models are successfully validated by simulations and measurements in the frequency range 0.1-20 GHz. Using the proposed models, we estimate and analyze the impedance curves of the interposer PDN and TSV-based stacked grid-type PDN with respect to the variations in the horizontal area of the interposer PDN and the number of power/ground TSVs in TSV-based stacked grid-type PDNs, respectively.