Design of a small-area and high-throughput turbo decoder for LTE-advanced systemsLTE-Advanced 시스템을 위한 저면적 고성능 터보 디코더의 설계

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dc.contributor.advisorPark, In-Cheol-
dc.contributor.advisor박인철-
dc.contributor.authorYoo, In-Jae-
dc.contributor.author유인재-
dc.date.accessioned2013-09-12T02:01:56Z-
dc.date.available2013-09-12T02:01:56Z-
dc.date.issued2013-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=513300&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/181010-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2013.2, [ v, 41 p. ]-
dc.description.abstractTurbo code is one of the most powerful error control codes since it has been introduced in 1993. Thanks to its remarkable performance, most of the recent mobile communication standards specify the code as their mandatory channel coding method. This is also true for LTE, which dominates the current market and upcoming LTE-Advanced standards. However, there have been only minor attempts to develop a turbo decoder, which fully supports those standards. The decoders should handle multi-rate codes because the standards dynamically control turbo code rate by puncturing the codes based on wireless channel condition. In addition, extremely high-throughput, 1Gbps, is required for the LTE-Advanced compatible turbo decoders. This thesis proposes two decoding methods and a resultant turbo decoder design. Firstly, a memory-optimized hybrid decoding method is presented to properly decode multi-rate codes. The method takes ad-vantages of two traditional sliding window algorithms and provides superior error-correcting performance for multi-rate codes. It is more valuable because the method minimizes the additional hardware overhead, border metric memory size. Secondly, a tail-overlapped decoding method is proposed to significantly enhance the throughput of the decoder. No additional hardware is required as well as the error-correcting performance is kept for high-rate codes. Lastly, a LTE-Advanced compatible turbo decoder is designed by employing the two methods. Hybrid constituent decoder architecture and a contention-free extrinsic memory system for the tail-overlapped method are proposed. The resultant decoder outperforms other traditional designs for multi-rate codes. In addition, the de-sign is synthesized in a 0.13μm CMOS process to measure the enhanced throughput and complexity. As a result, the decoder operates in 1Gbps in tail-overlapped mode and occupies only 30% gate counts of an im-portant previous work, which also targets the LTE-Advanced applications.eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectturbo decoders-
dc.subjectmulti-rate turbo codes-
dc.subjectoverlapped decoding-
dc.subject터보 디코더-
dc.subject터보 코드-
dc.subject슬라이딩 윈도우-
dc.subjectsliding window algorithm-
dc.titleDesign of a small-area and high-throughput turbo decoder for LTE-advanced systems-
dc.title.alternativeLTE-Advanced 시스템을 위한 저면적 고성능 터보 디코더의 설계-
dc.typeThesis(Master)-
dc.identifier.CNRN513300/325007 -
dc.description.department한국과학기술원 : 전기및전자공학과, -
dc.identifier.uid020113379-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.localauthor박인철-
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