Advanced addition-only digital error correction 기법을 포함하는 0.5μm CMOS 2.3V 1.2mW 12b 3MS/s SAR ADC의 설계A 2.3V 1.2mW 12b 3MS/s SAR ADC with advanced addition-only digital error correction in 0.5μm CMOS
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 류승탁 | - |
| dc.contributor.advisor | Ryu, Seung-Tak | - |
| dc.contributor.author | 백승엽 | - |
| dc.contributor.author | Baek, Seung-Yeob | - |
| dc.date.accessioned | 2013-09-12T01:58:56Z | - |
| dc.date.available | 2013-09-12T01:58:56Z | - |
| dc.date.issued | 2012 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=486800&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/180874 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 2012.2, [ vi, 55 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.subject | A2ADEC) | - |
| dc.subject | Advanced addition-only digital error correction (Advanced ADEC | - |
| dc.subject | Successive Approximation Register ADC | - |
| dc.subject | SAR ADC | - |
| dc.subject | digital error correction | - |
| dc.subject | SAR ADC | - |
| dc.subject | Successive Approximation Register ADC | - |
| dc.subject | Advanced addition-only digital error correction (Advanced ADEC | - |
| dc.subject | A2ADEC) | - |
| dc.subject | digital error correction | - |
| dc.subject | multistep binary error correction | - |
| dc.subject | multistep binary error correction | - |
| dc.title | Advanced addition-only digital error correction 기법을 포함하는 0.5μm CMOS 2.3V 1.2mW 12b 3MS/s SAR ADC의 설계 | - |
| dc.title.alternative | A 2.3V 1.2mW 12b 3MS/s SAR ADC with advanced addition-only digital error correction in 0.5μm CMOS | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 486800/325007 | - |
| dc.description.department | 한국과학기술원 : 전기및전자공학과, | - |
| dc.identifier.uid | 020103297 | - |
| dc.contributor.localauthor | 류승탁 | - |
| dc.contributor.localauthor | Ryu, Seung-Tak | - |
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