On-Chip FPN Calibration for a Linear-Logarithmic APS Using Two-Step Charge Transfer

Cited 10 time in webofscience Cited 0 time in scopus
  • Hit : 635
  • Download : 0
This paper proposes a novel fixed pattern noise (FPN) calibration technique for a linear-logarithmic active pixel sensor (APS) based on the conventional four-transistor pixel structure. The offset FPN originated from the threshold characteristic variation of the transfer gate is calibrated with the proposed two-step charge transfer method, without any modification of the pixel structure or image-processing steps. The prototype sensor is fabricated by using a 0.13-mu m CMOS image sensor process. The chip includes a 320 x 240 pixel array with a 2.25 mu m pixel pitch and the peripheral circuitry. A wide dynamic range of more than 105 dB has been achieved from the proposed operation mode while maintaining the offset FPN less than 0.58% over the entire dynamic range.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2013-06
Language
English
Article Type
Article
Keywords

CMOS IMAGE SENSOR; DYNAMIC-RANGE; CAPACITOR

Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.60, no.6, pp.1989 - 1994

ISSN
0018-9383
DOI
10.1109/TED.2013.2259236
URI
http://hdl.handle.net/10203/174010
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 10 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0