DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, CW | ko |
dc.contributor.author | Lim, JW | ko |
dc.contributor.author | Yu, HY | ko |
dc.contributor.author | Pi, UH | ko |
dc.contributor.author | Ryu, MK | ko |
dc.contributor.author | Choi, Sung-Yool | ko |
dc.date.accessioned | 2013-06-07T06:42:23Z | - |
dc.date.available | 2013-06-07T06:42:23Z | - |
dc.date.created | 2013-05-13 | - |
dc.date.created | 2013-05-13 | - |
dc.date.created | 2013-05-13 | - |
dc.date.created | 2013-05-13 | - |
dc.date.issued | 2006-05 | - |
dc.identifier.citation | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, v.45, pp.4293 - 4295 | - |
dc.identifier.issn | 0021-4922 | - |
dc.identifier.uri | http://hdl.handle.net/10203/173741 | - |
dc.description.abstract | We propose a new fabrication process of nano-gap electrode pairs using an atomic-layer-deposited (ALD) sacrificial layer and the shadow deposition technique. In this process, gap width can be precisely controlled by the number of deposition cycles of the ALD process, whereas junction area is defined by the deposition angle of the second electrode material through an overhanging shadow mask on top of the first electrode. In comparison with our previous method, process reliability has been highly improved because the unintentional deposition of the second electrode material on the sidewall of the first electrode is completely prevented. We have fabricated 10 x 10 arrays of n-type polycrystalline silicon (n-poly-Si)/Au nano-gap electrode pairs with gap widths of 6 and 9 nm, which show good insulating properties at room temperature. | - |
dc.language | English | - |
dc.publisher | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | - |
dc.title | Fabrication of nano-gap electrode pairs using atomic-layer-deposited sacrificial layer and shadow deposition | - |
dc.type | Article | - |
dc.identifier.wosid | 000237713700095 | - |
dc.identifier.scopusid | 2-s2.0-33646865474 | - |
dc.type.rims | ART | - |
dc.citation.volume | 45 | - |
dc.citation.beginningpage | 4293 | - |
dc.citation.endingpage | 4295 | - |
dc.citation.publicationname | JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | - |
dc.identifier.doi | 10.1143/JJAP.45.4293 | - |
dc.contributor.localauthor | Choi, Sung-Yool | - |
dc.contributor.nonIdAuthor | Park, CW | - |
dc.contributor.nonIdAuthor | Lim, JW | - |
dc.contributor.nonIdAuthor | Yu, HY | - |
dc.contributor.nonIdAuthor | Pi, UH | - |
dc.contributor.nonIdAuthor | Ryu, MK | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | nano-gap electrode | - |
dc.subject.keywordAuthor | atomic layer deposition | - |
dc.subject.keywordAuthor | sacrificial layer | - |
dc.subject.keywordAuthor | molecular device | - |
dc.subject.keywordPlus | METALLIC ELECTRODES | - |
dc.subject.keywordPlus | LITHOGRAPHY | - |
dc.subject.keywordPlus | SEPARATION | - |
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