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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm

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dc.contributor.authorChung, Chaehoko
dc.contributor.authorLee, Soobumko
dc.contributor.authorKwak, Byung Manko
dc.contributor.authorKim, Gawonko
dc.contributor.authorKim, Jounghoko
dc.date.accessioned2010-03-24T05:17:03Z-
dc.date.available2010-03-24T05:17:03Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2006-11-06-
dc.identifier.citationChina-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems, pp.551 - 556-
dc.identifier.urihttp://hdl.handle.net/10203/17302-
dc.description.sponsorshipSamsung endowment fund for Chair Professorshipen
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherCJK-OSM-
dc.titleDelay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm-
dc.typeConference-
dc.identifier.wosid000244096300093-
dc.type.rimsCONF-
dc.citation.beginningpage551-
dc.citation.endingpage556-
dc.citation.publicationnameChina-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems-
dc.identifier.conferencecountryCC-
dc.identifier.conferencelocationKunming-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKwak, Byung Man-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorChung, Chaeho-
dc.contributor.nonIdAuthorLee, Soobum-
dc.contributor.nonIdAuthorKim, Gawon-
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