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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

High Speed and Low Noise Packaging Design Methodologies for 40 Gbps SerDes Channel with PBGA Type Package

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dc.contributor.authorKam, DG-
dc.contributor.authorYu, J-
dc.contributor.authorChoi, H-
dc.contributor.authorBae, K-
dc.contributor.authorKim, J-
dc.contributor.authorJeong, D.-K-
dc.contributor.authorLee, C-
dc.contributor.authorKim, Joungho-
dc.date.accessioned2010-03-24T04:45:01Z-
dc.date.available2010-03-24T04:45:01Z-
dc.date.created2012-02-06-
dc.date.issued2006-03-26-
dc.identifier.citationPIERS2006 conference, v., no., pp.128 - 128-
dc.identifier.issn1559-8985-
dc.identifier.urihttp://hdl.handle.net/10203/17299-
dc.languageENG-
dc.language.isoen_USen
dc.publisherPIERS-
dc.titleHigh Speed and Low Noise Packaging Design Methodologies for 40 Gbps SerDes Channel with PBGA Type Package-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage128-
dc.citation.endingpage128-
dc.citation.publicationnamePIERS2006 conference-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorKam, DG-
dc.contributor.nonIdAuthorYu, J-
dc.contributor.nonIdAuthorChoi, H-
dc.contributor.nonIdAuthorBae, K-
dc.contributor.nonIdAuthorKim, J-
dc.contributor.nonIdAuthorJeong, D.-K-
dc.contributor.nonIdAuthorLee, C-
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EE-Conference Papers(학술회의논문)

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