A BER-aware ADC design guideline for 112 Gb/s optical DP-QPSK systems

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A bit-error-rate (BER) aware design guideline for 56GS/s analog-to-digital converters (ADC) is presented for 112Gb/s coherent optical communication systems. The effective number of bits (ENOB) has been used extensively to quantify the performance of an ADC even though it is only a sufficient condition for the system level BER. In this paper, the relationship between the ENOB of an ADC measured with sinusoids and the system level BER is formulated. The required frequency responses of the ENOB for given OSNR penalty specifications are provided as well. The BER-aware ADC design will lead to power and area reduction by relaxing the ADC requirements for 112Gb/s coherent optical communication systems.
Publisher
IEEE
Issue Date
2011-08-10
Language
ENG
Citation

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)

ISSN
1548-3746
URI
http://hdl.handle.net/10203/170451
Appears in Collection
EE-Conference Papers(학술회의논문)
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