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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Wideband low power distribution network impedance of high chip density package using 3-D stacked through silicon vias

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dc.contributor.authorPak, J.S.ko
dc.contributor.authorRyu, C.ko
dc.contributor.authorKim, J.ko
dc.contributor.authorShim, Y.ko
dc.contributor.authorKim, G.ko
dc.contributor.authorKim, Jounghoko
dc.date.accessioned2010-03-08T06:07:37Z-
dc.date.available2010-03-08T06:07:37Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2008-05-19-
dc.identifier.citation2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008, pp.351 - 354-
dc.identifier.urihttp://hdl.handle.net/10203/17008-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-
dc.titleWideband low power distribution network impedance of high chip density package using 3-D stacked through silicon vias-
dc.typeConference-
dc.identifier.wosid000258515300089-
dc.identifier.scopusid2-s2.0-51749083076-
dc.type.rimsCONF-
dc.citation.beginningpage351-
dc.citation.endingpage354-
dc.citation.publicationname2008 Asia-Pacific Symposium on Electromagnetic Compatibility and 19th International Zurich Symposium on Electromagnetic Compatibility, APEMC 2008-
dc.identifier.conferencecountrySI-
dc.identifier.conferencelocationSuntec-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorPak, J.S.-
dc.contributor.nonIdAuthorRyu, C.-
dc.contributor.nonIdAuthorKim, J.-
dc.contributor.nonIdAuthorShim, Y.-
dc.contributor.nonIdAuthorKim, G.-
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