Energy Minimization of 3D Cache-Stacked Processor Based on Thin-Film Thermoelectric Coolers

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dc.contributor.authorKyung, Chong-Min-
dc.contributor.authorRho, Soojung-
dc.contributor.authorkang, KyungsU-
dc.date.accessioned2013-03-29T09:10:07Z-
dc.date.available2013-03-29T09:10:07Z-
dc.date.created2012-07-03-
dc.date.issued2011-08-08-
dc.identifier.citationThe 54th International Midwest Symposium on Circuits and Systems (MWSCAS), v., no., pp. --
dc.identifier.urihttp://hdl.handle.net/10203/169650-
dc.languageENG-
dc.titleEnergy Minimization of 3D Cache-Stacked Processor Based on Thin-Film Thermoelectric Coolers-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.publicationnameThe 54th International Midwest Symposium on Circuits and Systems (MWSCAS)-
dc.identifier.conferencecountrySouth Korea-
dc.identifier.conferencecountrySouth Korea-
dc.contributor.localauthorKyung, Chong-Min-
dc.contributor.nonIdAuthorRho, Soojung-
dc.contributor.nonIdAuthorkang, KyungsU-
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EE-Conference Papers(학술회의논문)
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