An efficient edge traces technique for 3D interconnection of stack chip

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Issue Date
2011-05-31
Language
ENG
Citation

2011 61st Electronic Components and Technology Conference, ECTC 2011, pp.1878 - 1882

ISSN
0569-5503
URI
http://hdl.handle.net/10203/165652
Appears in Collection
ME-Conference Papers(학술회의논문)
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