A 550μW 10b 40MS/s SAR ADC with multistep addition-only digital error correction
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Cho, S.-H. | ko |
| dc.contributor.author | Lee, C.-K. | ko |
| dc.contributor.author | Kwon, J.-K. | ko |
| dc.contributor.author | Ryu, Seung-Tak | ko |
| dc.date.accessioned | 2013-03-28T08:11:09Z | - |
| dc.date.available | 2013-03-28T08:11:09Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2010-09-19 | - |
| dc.identifier.citation | 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, pp.561 - 564 | - |
| dc.identifier.issn | 0886-5930 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/164037 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | A 550μW 10b 40MS/s SAR ADC with multistep addition-only digital error correction | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000287027300029 | - |
| dc.identifier.scopusid | 2-s2.0-78649898333 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 561 | - |
| dc.citation.endingpage | 564 | - |
| dc.citation.publicationname | 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010 | - |
| dc.identifier.conferencecountry | US | - |
| dc.contributor.localauthor | Ryu, Seung-Tak | - |
| dc.contributor.nonIdAuthor | Cho, S.-H. | - |
| dc.contributor.nonIdAuthor | Lee, C.-K. | - |
| dc.contributor.nonIdAuthor | Kwon, J.-K. | - |
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