Latency-aware utility-based NUCA cache partitioning in 3D-stacked multi-processor systems

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Publisher
IEEE/IFIP
Issue Date
2010-09-27
Language
ENG
Citation

2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pp.125 - 130

URI
http://hdl.handle.net/10203/163907
Appears in Collection
EE-Conference Papers(학술회의논문)
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