Studies on Microvoids at the Interface of Direct Bonded Silicon Wafers

Abstract

The microvoids at the interface of direct bonded silicon wafers were studied in view of surface damage, micro particles, and micro gas trap. The microvoids due to surface damages at the edge of wafer and micro particles could be avoided, for the most part, by giving careful handling to wafers and using fresh hydrophilizing solutions, respectively. The micro gas trap voids, mostly with diameters in the range of 40-200 gm, have been observed at both the St-St and Si-SiO2 bonding interfaces. The effects of highly pressurized 50~ nitrogen flow on wafer surface, ambient gases at mating, and annealing temperature on the generation of micro gas trap voids were studied to clarify the causes of micro gas trap voids. These studies showed that the generation of micro gas trap void sensitively depended upon the process conditions related to the surfaces of wafers, especially on the heated high pressure nitrogen showering on the surface before mating.