A CMOS burst-mode TIA with step AGC and selective internally created reset for 1.25Gb/S EPON

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dc.contributor.authorLe, Q.-
dc.contributor.authorLee, Sang-Gug-
dc.contributor.authorKang, H.-Y.-
dc.contributor.authorChai, S.-H.-
dc.date.accessioned2013-03-19T02:50:07Z-
dc.date.available2013-03-19T02:50:07Z-
dc.date.created2012-02-06-
dc.date.issued2007-02-11-
dc.identifier.citation54th IEEE International Solid-State Circuits Conference, ISSCC 2007, v., no., pp.50 --
dc.identifier.issn0193-6530-
dc.identifier.urihttp://hdl.handle.net/10203/155058-
dc.languageENG-
dc.titleA CMOS burst-mode TIA with step AGC and selective internally created reset for 1.25Gb/S EPON-
dc.typeConference-
dc.identifier.scopusid2-s2.0-34548820425-
dc.type.rimsCONF-
dc.citation.beginningpage50-
dc.citation.publicationname54th IEEE International Solid-State Circuits Conference, ISSCC 2007-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorLee, Sang-Gug-
dc.contributor.nonIdAuthorLe, Q.-
dc.contributor.nonIdAuthorKang, H.-Y.-
dc.contributor.nonIdAuthorChai, S.-H.-
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EE-Conference Papers(학술회의논문)
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