A High-efficiency High-power Step-up Converter with Low Ripple Content

Abstract

A new phase-shifted parallel-input/senes-output (PISO) dual inductor-fed push-pull convener for high-power step-up applications is proposed This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 3S0Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.