A 4Gb/s Clock and Data Recovery Circuit Using Four Phase 1/8 Rate Clock

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 420
  • Download : 0
DC FieldValueLanguage
dc.contributor.authorYoo, Hoi-Jun-
dc.contributor.authorSong, Seong-Jun-
dc.contributor.authorLee, Jaeseo-
dc.contributor.authorPark, Sung Min-
dc.date.accessioned2013-03-16T18:02:20Z-
dc.date.available2013-03-16T18:02:20Z-
dc.date.created2012-02-06-
dc.date.issued2002-
dc.identifier.citationEuropean Solid State Circuit Conference, v., no., pp.239 - 242-
dc.identifier.urihttp://hdl.handle.net/10203/134063-
dc.languageENG-
dc.titleA 4Gb/s Clock and Data Recovery Circuit Using Four Phase 1/8 Rate Clock-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage239-
dc.citation.endingpage242-
dc.citation.publicationnameEuropean Solid State Circuit Conference-
dc.identifier.conferencecountryItaly-
dc.identifier.conferencecountryItaly-
dc.contributor.localauthorYoo, Hoi-Jun-
dc.contributor.nonIdAuthorSong, Seong-Jun-
dc.contributor.nonIdAuthorLee, Jaeseo-
dc.contributor.nonIdAuthorPark, Sung Min-
Appears in Collection
EE-Conference Papers(학술회의논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0