A Timing-Driven Synthesis of Arithmetic Circuits using Carry-Save-Adders
- Issue Date
- 2000
- Language
- ENG
- Citation
IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp.313 - 316
- Appears in Collection
- RIMS Conference Papers
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.