Showing results 1 to 6 of 6
A control method to reduce the standard deviation of flow time in wafer fabrication Yoon, HJ; Lee, Doo Yong, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.13, no.3, pp.389 - 392, 2000-08 |
Deadlock-free scheduling method for track systems in semiconductor fabrication Yoon, HJ; Lee, Doo Yong, 2000 IEEE International Conference on Systems, Man and Cybernetics, pp.1787 - 1792, IEEE, 2000-10-08 |
Deadlock-free scheduling of photolithography equipment in semiconductor fabrication Yoon, HJ; Lee, Doo Yong, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.17, no.1, pp.42 - 54, 2004-02 |
Identification of potential deadlock set in semiconductor track systems Yoon, HJ; Lee, Doo Yong, 2001IEEE International Conference on Robotics and Automation (ICRA), pp.1820 - 1825, IEEE, 2001-05-21 |
Online scheduling of integrated single-wafer processing tools with temporal constraints Yoon, HJ; Lee, Doo Yong, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.18, pp.390 - 398, 2005-08 |
Real-time scheduling of wafer fabrication with multiple product types Yoon, HJ; Lee, Doo Yong, 1999 IEEE International Conference on Systems, Man, and Cybernetics 'Human Communication and Cybernetics', v.1, pp.835 - 840, 1999-10-12 |
Discover