Synthesis and optimization of interface hardware between IP's operating at different clock frequencies
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Park, BI | ko |
| dc.contributor.author | Choi, H | ko |
| dc.contributor.author | Park, In-Cheol | ko |
| dc.contributor.author | Kyung, Chong-Min | ko |
| dc.date.accessioned | 2013-03-16T08:55:58Z | - |
| dc.date.available | 2013-03-16T08:55:58Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2000-09-17 | - |
| dc.identifier.citation | 2000 International Conference on Computer Design, pp.519 - 524 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/129585 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | Synthesis and optimization of interface hardware between IP's operating at different clock frequencies | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000165305100070 | - |
| dc.identifier.scopusid | 2-s2.0-0033696390 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 519 | - |
| dc.citation.endingpage | 524 | - |
| dc.citation.publicationname | 2000 International Conference on Computer Design | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Austin, TX, USA | - |
| dc.contributor.localauthor | Park, In-Cheol | - |
| dc.contributor.localauthor | Kyung, Chong-Min | - |
| dc.contributor.nonIdAuthor | Park, BI | - |
| dc.contributor.nonIdAuthor | Choi, H | - |
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