New adder scheme with reduced P, G signal generations using redundant binary number system
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Han Kyung-Nam | - |
| dc.contributor.author | Han Sang-Wook | - |
| dc.contributor.author | Yoon Euisik | - |
| dc.date.accessioned | 2013-03-16T05:23:42Z | - |
| dc.date.available | 2013-03-16T05:23:42Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2000-05-28 | - |
| dc.identifier.citation | Proceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems, v.5, no., pp. - | - |
| dc.identifier.issn | 0271-4310 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/127900 | - |
| dc.language | ENG | - |
| dc.title | New adder scheme with reduced P, G signal generations using redundant binary number system | - |
| dc.type | Conference | - |
| dc.identifier.scopusid | 2-s2.0-0033683726 | - |
| dc.type.rims | CONF | - |
| dc.citation.volume | 5 | - |
| dc.citation.publicationname | Proceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems | - |
| dc.contributor.localauthor | Yoon Euisik | - |
| dc.contributor.nonIdAuthor | Han Kyung-Nam | - |
| dc.contributor.nonIdAuthor | Han Sang-Wook | - |
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