Equivalent circuit representation and dimension reduction technique for efficient FDTD modeling of power/ground plane

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Publisher
IEEE
Issue Date
2001-10-29
Language
English
Citation

IEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2001, pp.145 - 148

URI
http://hdl.handle.net/10203/127545
Appears in Collection
EE-Conference Papers(학술회의논문)
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