Multi-thread VLIW processor architecture for HDTV decoding
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, H | ko |
| dc.contributor.author | Yang, WS | ko |
| dc.contributor.author | Shin, MC | ko |
| dc.contributor.author | Min, SJ | ko |
| dc.contributor.author | Bae, SO | ko |
| dc.contributor.author | Park, In-Cheol | ko |
| dc.date.accessioned | 2013-03-16T03:55:55Z | - |
| dc.date.available | 2013-03-16T03:55:55Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2000-05-21 | - |
| dc.identifier.citation | CICC 2000: 22nd Annual Custom Integrated Circuits Conference, pp.559 - 562 | - |
| dc.identifier.issn | 0886-5930 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/127212 | - |
| dc.language | English | - |
| dc.publisher | CICC | - |
| dc.title | Multi-thread VLIW processor architecture for HDTV decoding | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000088385300121 | - |
| dc.identifier.scopusid | 2-s2.0-0033713493 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 559 | - |
| dc.citation.endingpage | 562 | - |
| dc.citation.publicationname | CICC 2000: 22nd Annual Custom Integrated Circuits Conference | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Orlando, FL, USA | - |
| dc.contributor.localauthor | Park, In-Cheol | - |
| dc.contributor.nonIdAuthor | Kim, H | - |
| dc.contributor.nonIdAuthor | Yang, WS | - |
| dc.contributor.nonIdAuthor | Shin, MC | - |
| dc.contributor.nonIdAuthor | Min, SJ | - |
| dc.contributor.nonIdAuthor | Bae, SO | - |
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