Analysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices

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dc.contributor.authorChoi, Sung-Jinko
dc.contributor.authorHan, Jin-Wooko
dc.contributor.authorJang, Moon-Gyuko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2009-11-10T07:24:18Z-
dc.date.available2009-11-10T07:24:18Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2009-10-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.30, no.10, pp.1084 - 1086-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/12362-
dc.description.abstractThe aim of this letter is to analyze the spatial distribution of trapped charges in the type of dopant-segregated Schottky barrier (DSSB)-embedded FinFET SONOS devices used in NAND-type Flash memory. Due to localized programming by carrier injection with extra kinetic energy, the spatial distribution of electrons trapped in an O/N/O layer of a DSSB SONOS device after a short time of programming differs from that in an O/N/O layer of a conventional SONOS device, which results in the degradation of subthreshold slope (SS). Note that the degraded SS recovers as the program time increases. The measured and simulated data confirm that the high speed of the programming is due largely to the localized trapped charges injected from DSSB source/drain junctions.-
dc.description.sponsorshipthe National Research Program for the 0.1-Terabit Nonvolatile Memory Development Initiative, sponsored by the Korean Ministry of Commerce, Industry and Energyen
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectSUBTHRESHOLD SLOPE-
dc.subjectMEMORY-
dc.titleAnalysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices-
dc.typeArticle-
dc.identifier.wosid000270227600024-
dc.identifier.scopusid2-s2.0-72049115242-
dc.type.rimsART-
dc.citation.volume30-
dc.citation.issue10-
dc.citation.beginningpage1084-
dc.citation.endingpage1086-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2009.2027724-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.nonIdAuthorJang, Moon-Gyu-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorDopant-segregated Schottky barrier (DSSB)-
dc.subject.keywordAuthordopant segregation-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthorFlash memory-
dc.subject.keywordAuthorlocalized trapping-
dc.subject.keywordAuthorSchottky barrier-
dc.subject.keywordAuthorSONOS-
dc.subject.keywordAuthorsubthreshold slope (SS)-
dc.subject.keywordPlusSUBTHRESHOLD SLOPE-
dc.subject.keywordPlusMEMORY-
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