Effects of analog multiplier offsets on on-chip learning, International Conference on Neural Networks

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Offsets inherent in analog circuits have been big obstacle in analog implementations of backpropagation algorithm. In this article the effects of analog multiplier offsets on on-chip learning are systematically analyzed. Offsets in a multiplier are mathematically modeled and incorporated into backpropagation learning equations. The deformed equations are investigated to show how the offsets degrade learning performance and under which conditions the neuron's output fails to converge. Simulation results agree well with analytic calculations
Issue Date
1997-06-09
Language
ENG
Citation

Proceedings of the 1997 IEEE International Conference on Neural Networks. , pp.928 - 932

URI
http://hdl.handle.net/10203/123545
Appears in Collection
EE-Conference Papers(학술회의논문)ME-Conference Papers(학술회의논문)
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