Reducing the size of a BDD in the combinational circuit power estimation by using the dynamic size limit
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Choi Hoon | - |
| dc.contributor.author | Hwang Seung Ho | - |
| dc.date.accessioned | 2013-03-15T12:56:38Z | - |
| dc.date.available | 2013-03-15T12:56:38Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1997-06-09 | - |
| dc.identifier.citation | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, no., pp.1520 - 1523 | - |
| dc.identifier.issn | 0271-4310 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/119648 | - |
| dc.language | ENG | - |
| dc.title | Reducing the size of a BDD in the combinational circuit power estimation by using the dynamic size limit | - |
| dc.type | Conference | - |
| dc.identifier.scopusid | 2-s2.0-0030708988 | - |
| dc.type.rims | CONF | - |
| dc.citation.volume | 3 | - |
| dc.citation.beginningpage | 1520 | - |
| dc.citation.endingpage | 1523 | - |
| dc.citation.publicationname | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) | - |
| dc.identifier.conferencecountry | Hong Kong | - |
| dc.identifier.conferencecountry | Hong Kong | - |
| dc.contributor.localauthor | Hwang Seung Ho | - |
| dc.contributor.nonIdAuthor | Choi Hoon | - |
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