Triple Bit-line Per One Sense Amp.(TBOS) Scheme with High Speed and Safe Operation Conditions for Giga-scale DRAM

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dc.contributor.author유회준-
dc.contributor.author김종식-
dc.contributor.author서광석-
dc.contributor.author최유수-
dc.date.accessioned2013-03-15T11:07:40Z-
dc.date.available2013-03-15T11:07:40Z-
dc.date.created2012-02-06-
dc.date.issued1997-
dc.identifier.citation제 4회 한국반도체 학술대회, v., no., pp. --
dc.identifier.urihttp://hdl.handle.net/10203/118882-
dc.languageKOR-
dc.publisher대한전자공학회-
dc.titleTriple Bit-line Per One Sense Amp.(TBOS) Scheme with High Speed and Safe Operation Conditions for Giga-scale DRAM-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.publicationname제 4회 한국반도체 학술대회-
dc.identifier.conferencecountrySouth Korea-
dc.identifier.conferencecountrySouth Korea-
dc.contributor.localauthor유회준-
dc.contributor.nonIdAuthor김종식-
dc.contributor.nonIdAuthor서광석-
dc.contributor.nonIdAuthor최유수-
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EE-Conference Papers(학술회의논문)
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