Translation from DEVS models to synthesizable VHDL programs
- Publisher
- IEEE
- Issue Date
- 1996-11-26
- Language
- English
- Citation
Proceedings of the 1996 IEEE Region 10 TENCON - Digital Signal Processing Applications Conference. Part 2 (of 2), pp.252 - 255
- Appears in Collection
- EE-Conference Papers(학술회의논문)
- Files in This Item
- There are no files associated with this item.
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