A new 4-2 adder and booth selector for low power MAC unit

Cited 1 time in webofscience Cited 0 time in scopus
  • Hit : 342
  • Download : 0
The integration level of VLSI system increases as the technology improves. The he power dissipation of the data processing unit in the digital signal processing systems must be kept as low as possible. Thus, we newly designed a 4-2 adder and a booth selector by using transmission gate circuits to accomplish low power consumption without performance sacrifice. The proposed 4-2 adder consumes lower power than the conventional 4-2 adder by 16% and the proposed booth selector consumes less power than the conventional booth selector by 60%. We designed a 32-bit MAC unit with the proposed 4-2 adder and the booth selector. The power dissipation of the 32-bit MAC unit is 124mW at 100MHz with 2V power supply, with the area of 1.3mm x 2.4mm.
Publisher
ISLPED '97
Issue Date
1997-08-18
Language
English
Citation

Proceedings of the 1997 International Symposium on Low Power Electronics and Design, pp.100 - 103

DOI
10.1109/LPE.1997.621250
URI
http://hdl.handle.net/10203/117876
Appears in Collection
EE-Conference Papers(학술회의논문)
Files in This Item
There are no files associated with this item.
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 1 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0