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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics

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dc.contributor.authorShin, HC-
dc.contributor.authorLee, JA-
dc.contributor.authorKim, Lee-Sup-
dc.date.accessioned2013-03-15T05:10:29Z-
dc.date.available2013-03-15T05:10:29Z-
dc.date.created2012-02-06-
dc.date.issued1998-10-05-
dc.identifier.citationProceedings of the 1998 IEEE International Conference on Computer Design, v., no., pp.286 - 291-
dc.identifier.urihttp://hdl.handle.net/10203/116592-
dc.languageENG-
dc.titleMinimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics-
dc.typeConference-
dc.identifier.scopusid2-s2.0-0032297481-
dc.type.rimsCONF-
dc.citation.beginningpage286-
dc.citation.endingpage291-
dc.citation.publicationnameProceedings of the 1998 IEEE International Conference on Computer Design-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorKim, Lee-Sup-
dc.contributor.nonIdAuthorShin, HC-
dc.contributor.nonIdAuthorLee, JA-
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EE-Conference Papers(학술회의논문)
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