DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, BS | - |
dc.contributor.author | Kim, Lee-Sup | - |
dc.date.accessioned | 2013-03-15T04:36:18Z | - |
dc.date.available | 2013-03-15T04:36:18Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1997-06-09 | - |
dc.identifier.citation | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4), v.3, no., pp.1820 - 1823 | - |
dc.identifier.issn | 0271-4310 | - |
dc.identifier.uri | http://hdl.handle.net/10203/116412 | - |
dc.language | ENG | - |
dc.title | Low power 100 MHz all digital delay-locked loop | - |
dc.type | Conference | - |
dc.identifier.scopusid | 2-s2.0-0030648735 | - |
dc.type.rims | CONF | - |
dc.citation.volume | 3 | - |
dc.citation.beginningpage | 1820 | - |
dc.citation.endingpage | 1823 | - |
dc.citation.publicationname | Proceedings of the 1997 IEEE International Symposium on Circuits and Systems, ISCAS'97. Part 4 (of 4) | - |
dc.identifier.conferencecountry | Hong Kong | - |
dc.identifier.conferencecountry | Hong Kong | - |
dc.contributor.localauthor | Kim, Lee-Sup | - |
dc.contributor.nonIdAuthor | Kim, BS | - |
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