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College of Engineering(공과대학)Dept. of Materials Science and Engineering(신소재공학과)MS-Conference Papers(학술회의논문)

Room Temperature 0.1 um CMOS Technology with 11.8 ps Gate Delay

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dc.contributor.authorJeon, Duk Young-
dc.contributor.authorLee, KF-
dc.contributor.authorYan, RH-
dc.contributor.authorChin, GM-
dc.contributor.authorKim, YO-
dc.contributor.authorTennant, DM-
dc.contributor.authorRazavi, B-
dc.contributor.authorLin, HD-
dc.contributor.authorWey, YG-
dc.contributor.authorWesterwick, EH-
dc.contributor.authorMorris, MD-
dc.contributor.authorJohnson, RW-
dc.contributor.authorLiu, TM-
dc.contributor.authorTarsia, M-
dc.contributor.authorCerullo, M-
dc.contributor.authorSwartz, RG-
dc.contributor.authorOurmazd, A-
dc.date.accessioned2013-03-14T22:56:26Z-
dc.date.available2013-03-14T22:56:26Z-
dc.date.created2012-02-06-
dc.date.issued1993-
dc.identifier.citationTechnical Digest of IEDM 1993, v., no., pp.131 - 134-
dc.identifier.urihttp://hdl.handle.net/10203/114266-
dc.languageENG-
dc.titleRoom Temperature 0.1 um CMOS Technology with 11.8 ps Gate Delay-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage131-
dc.citation.endingpage134-
dc.citation.publicationnameTechnical Digest of IEDM 1993-
dc.contributor.localauthorJeon, Duk Young-
dc.contributor.nonIdAuthorLee, KF-
dc.contributor.nonIdAuthorYan, RH-
dc.contributor.nonIdAuthorChin, GM-
dc.contributor.nonIdAuthorKim, YO-
dc.contributor.nonIdAuthorTennant, DM-
dc.contributor.nonIdAuthorRazavi, B-
dc.contributor.nonIdAuthorLin, HD-
dc.contributor.nonIdAuthorWey, YG-
dc.contributor.nonIdAuthorWesterwick, EH-
dc.contributor.nonIdAuthorMorris, MD-
dc.contributor.nonIdAuthorJohnson, RW-
dc.contributor.nonIdAuthorLiu, TM-
dc.contributor.nonIdAuthorTarsia, M-
dc.contributor.nonIdAuthorCerullo, M-
dc.contributor.nonIdAuthorSwartz, RG-
dc.contributor.nonIdAuthorOurmazd, A-
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MS-Conference Papers(학술회의논문)
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