A Bendable-Channel FinFET for Logic Application

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dc.contributor.authorKwon, Soon-Gyuko
dc.contributor.authorHan, Jin-Wooko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2013-03-12T07:14:24Z-
dc.date.available2013-03-12T07:14:24Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2010-06-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.31, no.6, pp.624 - 626-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/101626-
dc.description.abstractBendable-channel fin field-effect transistor (FET) (FinFET) (BC-FinFET) is presented for the basic logic family that includes NAND, NOR, and pass gate. The BC-FinFET can replace the suspended-gate FET (SGFET), and its function is very similar to that of a double-gate MOSFET. The BC-FinFET is composed of an n-type and p-type MOSFETs, and hence, it can be applicable for logic circuits. Numerical simulations based on elementary characteristics extracted from the fabricated BC-FinFET have been carried out for NAND and NOR circuits from an input-output characteristics' point of view. The proposed architecture can improve the standby and dynamic power consumption by reduction of the number of SGFETs and the size of the chip, while improving circuit performance.-
dc.languageEnglish-
dc.publisherIEEE-Inst Electrical Electronics Engineers Inc-
dc.subjectSUSPENDED-GATE-FET-
dc.subjectLOW-POWER LOGIC-
dc.subjectDEVICES-
dc.subjectDESIGN-
dc.titleA Bendable-Channel FinFET for Logic Application-
dc.typeArticle-
dc.identifier.wosid000284097800026-
dc.identifier.scopusid2-s2.0-77953597412-
dc.type.rimsART-
dc.citation.volume31-
dc.citation.issue6-
dc.citation.beginningpage624-
dc.citation.endingpage626-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2010.2046614-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorBendable channel-
dc.subject.keywordAuthorCMOS-
dc.subject.keywordAuthordouble-gate (DG) MOSFET-
dc.subject.keywordAuthorFinFET-
dc.subject.keywordAuthorlogic circuit-
dc.subject.keywordAuthorsuspended-gate FET (SGFET)-
dc.subject.keywordPlusSUSPENDED-GATE-FET-
dc.subject.keywordPlusLOW-POWER LOGIC-
dc.subject.keywordPlusDEVICES-
dc.subject.keywordPlusDESIGN-
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