DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Sung-Jin | ko |
dc.contributor.author | Ahn, Jae-Hyuk | ko |
dc.contributor.author | Han, Jin-Woo | ko |
dc.contributor.author | Seol, Myeong-Lok | ko |
dc.contributor.author | Moon, Dong-Il | ko |
dc.contributor.author | Kim, Sung-Ho | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2013-03-12T00:46:19Z | - |
dc.date.available | 2013-03-12T00:46:19Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2011-02 | - |
dc.identifier.citation | NANO LETTERS, v.11, no.2, pp.854 - 859 | - |
dc.identifier.issn | 1530-6984 | - |
dc.identifier.uri | http://hdl.handle.net/10203/100867 | - |
dc.description.abstract | Through the fusion of electrostatics. and mechanical dynamics, we demonstrate a transformable silicon nanowire, (SiNW) field effect transistor (FET) through a Wafer-scale top-down approach. By felicitously taking advantage of the proposed electrostatic SiNW-FET with mechanically movable SiNWs, all essential logic gates, including address decoders, can be monolithically integrated into a single device. The unification of various functional devices, such as pn-diodes, FETs, logic gates, and address decoders, can therefore eliminate the complex fabrication issues associated with nanoscale integration. These results represent a step toward the creation of multifunctional and flexible nanoelectronics. | - |
dc.language | English | - |
dc.publisher | AMER CHEMICAL SOC | - |
dc.subject | LOGIC GATES | - |
dc.subject | DEVICES | - |
dc.subject | ELECTRONICS | - |
dc.subject | NANOTUBES | - |
dc.subject | WIRES | - |
dc.title | Transformable Functional Nanoscale Building Blocks with Wafer-Scale Silicon Nanowires | - |
dc.type | Article | - |
dc.identifier.wosid | 000287049100092 | - |
dc.identifier.scopusid | 2-s2.0-79851485076 | - |
dc.type.rims | ART | - |
dc.citation.volume | 11 | - |
dc.citation.issue | 2 | - |
dc.citation.beginningpage | 854 | - |
dc.citation.endingpage | 859 | - |
dc.citation.publicationname | NANO LETTERS | - |
dc.identifier.doi | 10.1021/nl104212e | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.nonIdAuthor | Han, Jin-Woo | - |
dc.contributor.nonIdAuthor | Seol, Myeong-Lok | - |
dc.contributor.nonIdAuthor | Moon, Dong-Il | - |
dc.contributor.nonIdAuthor | Kim, Sung-Ho | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Silicon nanowire | - |
dc.subject.keywordAuthor | field effect transistorjogic gates | - |
dc.subject.keywordAuthor | address decoders | - |
dc.subject.keywordAuthor | nanoelectromechanical systems | - |
dc.subject.keywordPlus | LOGIC GATES | - |
dc.subject.keywordPlus | DEVICES | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | NANOTUBES | - |
dc.subject.keywordPlus | WIRES | - |
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