DC Field | Value | Language |
---|---|---|
dc.contributor.author | Choi, Sung-Jin | ko |
dc.contributor.author | Moon, Dong-Il | ko |
dc.contributor.author | Kim, Sung-Ho | ko |
dc.contributor.author | Ahn, Jae-Hyuk | ko |
dc.contributor.author | Lee, Jin-Seong | ko |
dc.contributor.author | Kim, Jee-Yeon | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2013-03-12T00:19:11Z | - |
dc.date.available | 2013-03-12T00:19:11Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2011-05 | - |
dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.32, no.5, pp.602 - 604 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10203/100808 | - |
dc.description.abstract | A junctionless transistor with a width of 10 nm and a length of 50 nm is demonstrated for the first time. A silicon nanowire (SiNW) channel is completely surrounded by a gate, and the SiNW is built onto the bulk substrate. The proposed junctionless transistor is applied to a Flash memory device composed of oxide/nitride/oxide gate dielectrics. Acceptable memory characteristics are achieved regarding the endurance, data retention, and dc performance of the device. It can be expected that the inherent advantages of the junctionless transistor can overcome the scaling limitations in Flash memory. Hence, the junctionless transistor is a strong candidate for the further scaling of NAND Flash memory below the 20-nm node. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | ULTRA-HIGH DENSITY | - |
dc.subject | FLASH MEMORY | - |
dc.title | Nonvolatile Memory by All-Around-Gate Junctionless Transistor Composed of Silicon Nanowire on Bulk Substrate | - |
dc.type | Article | - |
dc.identifier.wosid | 000289908500008 | - |
dc.identifier.scopusid | 2-s2.0-79955533847 | - |
dc.type.rims | ART | - |
dc.citation.volume | 32 | - |
dc.citation.issue | 5 | - |
dc.citation.beginningpage | 602 | - |
dc.citation.endingpage | 604 | - |
dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.contributor.nonIdAuthor | Moon, Dong-Il | - |
dc.contributor.nonIdAuthor | Kim, Sung-Ho | - |
dc.contributor.nonIdAuthor | Lee, Jin-Seong | - |
dc.contributor.nonIdAuthor | Kim, Jee-Yeon | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | All-around gate (AAG) | - |
dc.subject.keywordAuthor | Bosch process | - |
dc.subject.keywordAuthor | bulk substrate | - |
dc.subject.keywordAuthor | Flash memory | - |
dc.subject.keywordAuthor | junctionless | - |
dc.subject.keywordAuthor | junctionless field-effect transistor (FET) | - |
dc.subject.keywordAuthor | junctionless transistor | - |
dc.subject.keywordAuthor | nanowire | - |
dc.subject.keywordAuthor | silicon nanowire (SiNW) | - |
dc.subject.keywordAuthor | SONOS | - |
dc.subject.keywordPlus | ULTRA-HIGH DENSITY | - |
dc.subject.keywordPlus | FLASH MEMORY | - |
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