A fully integrated CMOS power amplifier 5 GHz WLAN applications is implemented using 0.18 mu m CMOS technology. An on-chip, transmission-line transformer is used for output matching and voltage combining. An input balun. interstage matching components, an output transmission-line transformer, and RF chokes are fully integrated in the amplifier, and thus no external components Ore required. The power amplifier occupies a total area of 1.7 mm X 1.2 mm. At a 3.3 V supply voltage, the amplifier exhibits a 22.6 dBm output 1 dB compression point, 23.8 dBm saturated output power, and 25 dB power gain. The power added efficiency (PAE) is 21% at maximum, 19% at P(IdB). When a 54 Mbps/64 QAM OFDM signal is applied, the PA delivers an average power of 12 dBm at an EVM of -25 dB. (C) 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2551-2553. 2009 Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24683