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Showing results 2561 to 2580 of 234484

A 1.8dB NF 112mW single-chip diversity tuner for 2.6GHz S-DMB applications

Hwang, M.-W.; Beck, S.; Min, S.; Lee, S.; Yoo, S.; Lim, K.; Jung, H.; et al, 2006 IEEE International Solid-State Circuits Conference, ISSCC, IEEE, 2006-02-06

A 1.9 GHz High Dynamic Range CMOS Power Amplifier

홍성철researcher; 박창근; 김윤석; 한정후; 이동호; 백동현, 실리콘RF집적회로 기술워크샵, pp.438 -, 2005

A 1.9-GHz cmos power amplifier using an interdigitated transmission line transformer

Park, Changkun; Baek, Sang-Hyun; Ku, Bon-Hyun; Hong, Songcheolresearcher, MICROWAVE AND OPTICAL TECHNOLOGY LETTERS, v.49, no.12, pp.3162 - 3166, 2007-12

A 1.9-GHz CMOS power amplifier using three-port asymmetric transmission line transformer for a polar transmitter

Park, Changkun; Kim, Younsuk; Kim, Haksun; Hong, Songcheolresearcher, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.55, no.2, pp.230 - 238, 2007-02

A 1.9-GHz triple-mode class-E power amplifier for a polar transmitter

Park, C; Kim, Y; Kim, H; Hong, Songcheolresearcher, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.17, no.2, pp.148 - 150, 2007-02

A 1.93 TOPS/W Scalable Deep Learning/Inference Processor with Tetra-parallel MIMD Architecture for Big Data Applications

Yoo, Hoi-Junresearcher; Park, Seongwook; Bong, Kyeongryeol; Shin, Dongjoo; Lee, Jinmook; Choi, Sungpill, IEEE International Solid- State Circuits Conference, pp.80 - 81, IEEE, 2015-02-23

A 1.9nJ/Pixel Deep Neural Network Processor for High Speed Visual Attention in a Mobile Vision Recognition SoC

Yoo, Hoi Junresearcher; Hong, In Joon; Park, Seong Wook; Park, Jun Young, IEEE Asian Solid-State Circuits Conference(A-SSCC), pp.185 - 188, IEEE, 2015-11-10

A 10 bit gray scale digital-to-analog converter with an interpolating buffer amplifier for AMLCD column drivers

Lee, H.-M.; Son, Y.-S.; Jeon, Y.-J.; Jeon, J.-Y.; Lee, G.-H.; Jung, S.-C.; Cho, Gyu-Hyeongresearcher, 2007 SID International Symposium, pp.346 - 349, Society for Information Display, 2007-05-23

A 10 bit piecewise linear cascade interpolation DAC with loop gain ratio control

Lee, S.; Kim, K.; Park, K.; Park, C.; Lee, B.; Jeon, J.; Huh, J.; et al, 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, CICC 2010, 2010-09-19

A 10 bit piecewise linear cascade interpolation dac with loop gain ratio control

Lee, Sungwoo; Kim, Kiduk; Park, Kyusung; Park, Changbyung; Lee, Byunghun; Jeon, Jinyong; Jung, Seungchul; et al, 2010 IEEE Custom Integrated Circuits Conference -CICC 2010, IEEE, 2010-09

A 10 Bits Modified VCC Interpolation and DVO Correction by Drain Current Injection

Lee, Sungwoo; Kim, Ki-Duk; Park, Kyu-Sung; Park, Chang-Byung; Lee, Byung-Hun; Jeon, Jin-Yong; Jung, Seung-Chul; et al, 2010 SID Symposium, pp.58, Wiley, 2010-05

A 10 Gb/s Reference-Less Baud-Rate CDR for Low Power Consumption with Direct Feedback Method

Kim, Yong-Hun; Lee, Dongil; Lee, Daewoong; Kim, Lee-Supresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.11, pp.1539 - 1543, 2018-11


SONG, WC; Choi, HaeWookresearcher; KWAK, SU; SONG, BS, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.30, no.5, pp.514 - 521, 1995-05

A 10-bit 300Msample/s pipelined ADC using time-interleaved SAR ADC for front-end stages

Kim, Y.-H.; Lee, J.; Cho, SeongHwanresearcher, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.4041 - 4044, IEEE, 2010-05-30

A 10-Bit 40-MS/s Pipelined ADC With a Wide Range Operating Temperature for WAVE Applications

Oh, Ghilgeun; Lee, Chang-Kyo; Ryu, Seung-Takresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.1, pp.6 - 10, 2014-01

A 10-bit 50-MS/s pipelined ADC with opamp cuffent reuse

Ryu, Seung-Takresearcher; Song, BS; Bacrania, K, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.42, pp.475 - 485, 2007-03

A 10-Bit 80-MS/s Decision-Select Successive Approximation TDC in 65-nm CMOS

Chung, Hayun; Ishikuro, Hiroki; Kuroda, Tadahiro, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.5, pp.1232 - 1241, 2012-05

A 10-Bit Column-Driver IC With Parasitic-Insensitive Iterative Charge-Sharing Based Capacitor-String Interpolation for Mobile Active-Matrix LCDs

Kim, Hyun Sikresearcher; Yang, Jun-Hyeok; Park, Sang Hui; Ryu, Seung-Takresearcher; Cho, Gyu-Hyeongresearcher, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.49, no.3, pp.766 - 782, 2014-03

A 10-bit Modified VCC Interpolation and DVO Correction Using Drain-Current Injection

Cho, Gyu-Hyeongresearcher; Lee, SW; Park, GS; Kim, KD; Park, CB; Lee, BH; Jeon, JY; et al, SID 10 DIGEST, pp.58 - 61, SID 10 DIGEST, 2010-05-28

A 10-bit Serial Integration-Type DAC Architecture for AMLCD Column Drivers

Cho, Gyu-Hyeongresearcher; Kim, Ki-Duk; Woo, Young-Jin; Lee, Sung-Woo; Jeon, Yong-Joon; Jeon, Jin-Yong; Yang, Jun-Hyeok; et al, SID International Symposium, pp.379 - 382, 2009



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