Browse by Subject processor architectures
Showing results 1 to 3 of 3
| A Low-Cost Mechanism Exploiting Narrow-Width Values for Tolerating Hard Faults in ALU Hong, Seokin; Kim, Soontae, IEEE TRANSACTIONS ON COMPUTERS, v.64, no.9, pp.2433 - 2446, 2015-09 |
| Design and Analysis of Hybrid Flow Control for Hierarchical Ring Network-on-Chip Kim, Hanjoon; Kim, Gwangsun; Yeo, Hwasoo; Kim, John Dongjun; Maeng, Seungryoul, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.2, pp.480 - 494, 2016-02 |
| Designing a Resilient L1 Cache Architecture to Process Variation-Induced Access-Time Failures Hong, Seokin; Kim, Soontae, IEEE TRANSACTIONS ON COMPUTERS, v.65, no.10, pp.2999 - 3012, 2016-10 |
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