Showing results 1 to 5 of 5
0.6-2.7-Gb/s Referenceless Parallel CDR With a Stochastic Dispersion-Tolerant Frequency Acquisition Technique Han, Jinho; Won, Hyo Sup; Bae, Hyeon-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.22, no.6, pp.1219 - 1225, 2014-06 |
A 4 x 10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS Lee, Joon Yeong; Yang, Jaehyeok; Yoon, Jong Hyeok; Kwon, Soon Won; Won, Hyosup; Han, Jinho; Bae, Hyeon-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.6, pp.2310 - 2320, 2016-06 |
A Wide-Lock-In-Range and Low-Jitter 12-14.5 GHz SSPLL Using a Low-Power Frequency-Disturbance-Detecting and Correcting Loop Lim, Younghyun; Kim, Juyeop; Jo, Yongwoo; Bang, Jooeun; Choi, Jaehyouk, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.2, pp.480 - 491, 2022-02 |
An On-Chip Thermal Monitoring System With a Temperature Sensing Area of 52 mu m(2) in 180-nm CMOS Jung, Dong-Kyun; Seo, Jin-O; Cho, Seonghwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.10, pp.1638 - 1642, 2019-10 |
Analysis of a Frequency Acquisition Technique With a Stochastic Reference Clock Generator Han, Jinho; Yang, Jaehyeok; Bae, Hyeon-Min, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.59, no.6, pp.336 - 340, 2012-06 |
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