Browse by Subject memory optimization
Showing results 1 to 3 of 3
| Low-power Log-MAP decoding based on reduced metric memory access Lee, DS; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.53, no.6, pp.1244 - 1253, 2006-06 |
| Speculative loop pipelining in automatic binary translation for hardware acceleration = 하드웨어 가속을 위한 자동 이진 변환에서의 추론적 루프 파이프라이닝link Oh, Se-jong; 오세종; et al, 한국과학기술원, 2008 |
| Speculative loop-pipelining in binary translation for hardware acceleration Oh, S; Kim, Tag-Gon; Cho, J; Bozorgzadeh, E, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.27, pp.409 - 422, 2008-03 |
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