Showing results 1 to 2 of 2
Low-Power LDPC-CC Decoding Architecture Based on the Integration of Memory Banks Yoo, Injae; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.64, no.9, pp.1057 - 1061, 2017-09 |
Multi-Mode QC-LDPC Decoding Architecture With Novel Memory Access Scheduling for 5G New-Radio Standard Lee, Seongjin; Park, Sangsoo; Jang, Boseon; Park, In-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.69, no.5, pp.2035 - 2048, 2022-05 |
Discover