Browse by Subject SYNTHESIS METHODOLOGY

Showing results 1 to 3 of 3

1
CMOS Ternary Logic with a Biristor Threshold Switch for Low Static Power Consumption

Han, Joon-Kyu; Yu, Ji-Man; Nam, Seo-Yeon; Choi, Yang-Kyu, IEEE ELECTRON DEVICE LETTERS, v.43, no.7, pp.1005 - 1008, 2022-07

2
Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design

Ko, Jonghyun; Kim, Jongbeom; Jeong, Taegam; Jeong, Jaehoon; Song, Taigon, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.70, no.9, pp.3612 - 3624, 2023-09

3
Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density

Han, Joon-Kyu; Lee, Jung Woo; Kim, Young Bin; Yun, Seong-Yun; Yu, Jiman; Lee, Keon Jae; Choi, Yang-Kyu, ACS APPLIED MATERIALS & INTERFACES, v.15, no.44, pp.51429 - 51434, 2023-10

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