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Showing results 1 to 7 of 7

1
5G K-simulator: Link level simulator for

Park, G; Park, S; Seo, J; So, J; Wang, W; Yoo, S; Lim, SC; et al, IEEE DySPAN 2018, IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2018-10-23

2
Design of modular link-level simulator for 5G

Park, G; Park, S; Seo, J; So, J; Wang, W; Yoo, S; Lim, S; et al, 2018년도 한국통신학회 동계종합학술발표회, 한국통신학회, 2018-01-18

3
Investigation of gate-induced drain leakage (GIDL) current in thin body devices: Single-gate ultra-thin body, symmetrical double-gate, and asymmetrical double-gate MOSFETs

Choi, Yang-Kyu; Ha, D; King, TJ; Bokor, J, JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS, v.42, no.4B, pp.2073 - 2076, 2003-04

4
Link-level simulator for 5G NSA

Park, G; Park, S; Seo, J; So, J; Wang, W; Yoo, S; Lim, S; et al, 제28회 통신정보 합동학술대회, 한국통신학회 외, 2018-05-03

5
Low-frequency noise characteristics in p-channel FinFETs

Lee, JS; Choi, Yang-Kyu; Ha, D; King, TJ; Bokor, J, IEEE ELECTRON DEVICE LETTERS, v.23, no.12, pp.722 - 724, 2002-12

6
Metal gate technology for fully depleted SOI CMOS

Choi, Yang-Kyu; Ranade, P; Ha, D; Takeuchi, H; King, TJ, 4th International AVS Conference on Microelectronics and Interfaces(ICMI 03), AVS, 2003-03

7
Molybdenum gate technology for ultrathin-body MOSFETs and FinFETs

Ha, D; Takeuchi, H; Choi, Yang-Kyu; King, TJ, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.51, no.12, pp.1989 - 1996, 2004-12

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