Browse by Author Byun S.

Showing results 1 to 5 of 5

1
A low power CMOS bluetooth transceiver with a digital offset canceling DLL-based GFSK demodulator

Park C.-H.; Byun S.; Song Y.; Wang S.; Conroy C.; Kim B., 2003 Digest of Technical Papers, 2003-02-09

2
A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS

Yang J.; Kim J.; Byun S.; Conroy C.; Kim B., Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.134 -, 2003-02-15

3
A quad-channel 3.125Gb/s/ch serial-link transceiver with mixed-mode adaptive equalizer in 0.18um CMOS

Yang J.; Kim J.; Byun S.; Conroy C.; Kim B., Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference, v.47, pp.176 -, 2003-02-15

4
Implementation of the modified state mapping viterbi decoder with radix-4

Byun S.; Lee S.; Park, Sin Chong, 2006 International Conference on Communication Technology, ICCT '06, 2006-11-27

5
Performance compensation of IEEE 802.11e QoS stations with coexistence of legacy 802.11 stations

Byun S.; Lee S.; Park S.-C., 9th International Conference on Advanced Communication Technology, ICACT 2007, v.1, pp.18 - 22, 2007-02-12

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