Showing results 1 to 9 of 9
A general expansion architecture for large-scale multicast ATM switches Byun, SH; Sung, Dan Keun, IEICE TRANSACTIONS ON COMMUNICATIONS, v.E80B, no.11, pp.1671 - 1679, 1997-11 |
A General Expansion Architecture for Large-Scale Multicast ATM Switches Sung, Dan Keun; Byun, SH, IEEE Globecom'97, pp.247 - 251, 1997 |
A UniMIN Switch Architecture with Shared Output Buffer Type Interconnection Modules Sung, Dan Keun; Byun, SH, JC-CNSS, pp.263 - 267, 1994 |
A UniMIN Switch Architecture with Shared Output Buffer Type Interconnection Modules Byun, SH; Sung, Dan Keun, 6th JC-CNSS, KICS, 1993-03 |
A Universal Multistage Interconnection Network for Large Scale ATM Switches Sung, Dan Keun; Byun, SH, IEEE Globecom, pp.19 - 23, 1993 |
Cell-level/call-level ATM switch simulator Heo, JW; Byun, SH; Lee, JY; Sung, Dan Keun; Lee, SJ, TELECOMMUNICATION SYSTEMS, v.14, no.1-4, pp.291 - 309, 2000-08 |
FPGA Implementation of a Multistage Interconnection Network Switch Module Sung, Dan Keun; Yang, JW; Byun, SH; Heo, JW; Lee, JY; Nam, SY, JCCI, pp.448 - 452, 1998 |
Scalable Crossbar Matrix Switch Architecture Scheduled by Hierarchical Arbitration Sung, Dan Keun; Jun, JA; Byun, SH; Ahn, BJ, COIN, 2002-07 |
Two-Dimensional Crossbar Matrix Switch Architecture Sung, Dan Keun; Jun, JA; Byun, SH; Ahn, BJ; Nam, SY, APCC 2002, pp.411 - 415, 2002-09 |
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