Browse by Author 1096
Showing results 1 to 60 of 80
| 1x128 선형 어레이 적외선 감지소자의 Readout을 위한 Si 회로의 설계 및 제작 이희철; 신형철; 김충기; 윤난영; 김병혁, 제7회 HgCdTe 반도체 Conference, pp.84 - 89, 1996 |
| 25nm Bulk MOSFET with Floating Gate Spacer Hyung-Cheol Shin, Silicon Nanoelectronics Workshop, pp.12 - 13, 2000 |
| 40 nm Electron Beam Patterning and its Application to Silicon Nano-Structure Fabrication Lee, Kwyro; Shin, Hyung-Cheol; Han, S. Y.; Park, T. J.; Kim, B. K., ICVC, pp.163 - 165, 1999 |
| 40 nm Electron beam patterning by optimization of digitizing method and post exposure bake and its application to silicon nano-fabrication Lee, Kwyro; Shin, Hyung-Cheol; Han, S. Y.; Park, T. J.; Kim, B. K., International workshop on Advanced LSI's and Devices, pp.72 - 76, 1999 |
| 45 nm baised spacer MOSFET Hyung-Cheol Shin, Silicon Nanoelectronics Workshop, pp.126 - 127, 2003 |
| 50 nm MOSFET with Floating Polysilicon Spacer Hyung-Cheol Shin, IEEE Silicon Nanoelectronics Workshop, pp.54 - 55, 2001 |
| 50 nm MOSFET with High-k Dielectric Sidewall Hyung-Cheol Shin, IEEE Silicon Nanoelectronics Workshop, pp.70 - 71, 2001 |
| A 2.4-GHz Fully Integrated CMOS Quadrature VCO Hyung-Cheol Shin, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002 |
| A 2.4-GHz Fully Integrated CMOS Quadrature VCO 신형철, IDEC Conference 2002-Summer, pp.31 - 34, 2002 |
| A 5-GHz Band I/Q Generator using a Self-Calibration Technique Beom-Sup Kim; Hyung-Cheol Shin, European Solid-State Circuit Conference, pp.807 - 810, 2002 |
| A Digital Temperature Compensated Crystal Oscillator Using a Temperature Adaptive Capacitor Array Yoo, Hoi-Jun; Shin, Hyung-Cheol; Je, Minkyu; Gil, Joonho; Kwak, Jaeyoung, 6th International Conference on VLSI and CAD, pp.263 - 265, 1999 |
| A direct method to extract the substrate resistance components of RF MOSFETs valid up to 50 GHz Kim S.; Han J.; Shin H., 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.235 - 238, 2004-09-08 |
| A Model of Thin Oxide Damage by Plasma Etching and Ashing Processes Hyung-Cheol Shin, Plasma Etch, pp.27 - 29, 1991 |
| A nano-structure Memory with SOI Edge channel and A nano dot Hyung-Cheol Shin, MNC(Microproceses and Nanotechnology Conference), pp.315 - 316, 1998 |
| A New Curvature-Compensated CMOS Bandgap Reference with Low Power Consumption Hyung-Cheol Shin, ITC-CSCC 2000, pp.612 - 614, 2000 |
| A new RF model for the accumulation-mode MOS varactor Song S.-S.; Shin H., 2003 IEEE MTT-S International Microwave Symposium Digest, v.2, pp.1023 - 1026, 2003-06-08 |
| A New Small Signal Modeling of RF MOSFETs including Charge Conservation Capacitances Lee, Kwyro; Shin, Hyung-Cheol; Kwon, I. C.; Je, M. K., European Solid-State Circuits Conference (ESSCIRS' 2000), pp.296 - 299, 2000 |
| A New SOI Inverter using Active Body-Bias Hyung-Cheol Shin, ITC-CSCC, pp.1457 - 1459, 1998 |
| A Nonvolatile Memory Using Nanocrystals Formed by Wet Etching Hyung-Cheol Shin, ICSMM 2000, pp.124 - 125, 2000 |
| A scalable model for the substrate resistance in multi-finger RF MOSFETs Han J.; Shin H., 2003 IEEE MTT-S International Microwave Symposium Digest, v.3, pp.2105 - 2108, 2003-06-08 |
| A self-assembled silicon quantum dot transistor operation at room temperature Hyung-Cheol Shin, 1998 ASIAN SCIENCE SEMINAR, 1998 |
| A self-assembled silicon quantum dot transistor operation at room temperature Hyung-Cheol Shin, NPMS'98, 1998 |
| A self-assembled silicon quantum dot transistor operation at room temperature Hyung-Cheol Shin, Sound Quality Symposium Conference(SQS), 1998 |
| A Simple Technique to Measure Generation Lifetime in Partially Depleted SOI MOSFETS Hyung-Cheol Shin, 5th International Conference on VLSI and CAD, pp.55 - 59, 1997 |
| A Simple Wide-Band MIM Capacitor Model for RF Applications and the Effect of Substrate Grounded Shields Hyung-Cheol Shin, 2003 International Conference on Solid State Devices and Materials (SSDM 2003), 2003 |
| A Tri-Gate MOSFET with Gate-to-Source/Drain Non-overlapped Structure for 5 nm Regime Hyung-Cheol Shin, Silicon Nanoelectronics Workshop 2003, pp.32 - 33, 2003 |
| Accurate Four-Terminal RF MOSFET Model Accounting for the Short-Channel Effect in the Source-to-Drain Capacitance Hyung-Cheol Shin, SISPAD 2003, 2003 |
| Characteristics of P-channel Si Nano-crystal Memory Hyung-Cheol Shin, IEEE Region 10 Ionference, TENCON, pp.1140 - 1142, 1999 |
| Characteristics of P-channel Si Nano-crystal Memory with Tunneling Oxide Hyung-Cheol Shin, 99 ISDRS, pp.73 - 75, 1999 |
| Characteristics of Thermal Nitride Grown by IR Furnace Hyung-Cheol Shin, IUMRS-ICEM-98, pp.106 - 106, 1998 |
| Characterization of oxide Charging in a Magnetically Enhanced Rie Polysilicon Etcher Hyung-Cheol Shin, Proc. 11th International Syposium on Plasma Chemistry, pp.1534 - 1539, 1993 |
| Characterization of Process-Induced Damage During Aluminum Etching and Photoresist Ashing Hyung-Cheol Shin, International Wafer Level Reliability Workshop, pp.133 - 144, 1991 |
| Characterization of Thin Oxide Damage During Aluminum Etching and Photoresist Ashing Processes Hyung-Cheol Shin, International Symposium on VLSI Technology,Systems and Applications, pp.210 - 213, 1991 |
| CMOS RF modeling and parameter extraction approaches taking charge conservation into account Je, M.; Kwon, I.; Han, J.; Shin, H.; Lee, Kwyro, 2002 International Conference on Modeling and Simulation of Microsystems - MSM 2002, pp.698 - 701, 2002-04-21 |
| Comparative Study of the De-embedding Methods for RF device 신형철, Agilent EEsof User Workshop, pp.55 - 57, 2002 |
| Comparison of the characteristics of tunneling oxide and tunneling ON for P-channel Nano-crystal Memory Hyung-Cheol Shin, The 6th International Conference on VLSI and Cad(ICVC'99), pp.233 - 236, 1999 |
| DC and AC Characteristics of 10 nm T-Gate MOSFETs with Source/Drain-to-gate Non-Overlapped Structure Hyung-Cheol Shin, Silicon Nanoelectronics Workshop 2003, pp.24 - 25, 2003 |
| Device Characteristics of 25 nm MOSFET with Floating Side Gates Hyung-Cheol Shin, ICSMM 2000, pp.118 - 119, 2000 |
| Effect of Body Structure on Analog Performance of SOI NMOSFET's Hyung-Cheol Shin, IEEE SOI Conference, pp.61 - 62, 1998 |
| Fabrication and Characterization of a Quantum Dot Flash Memory Hyung-Cheol Shin, 99 International Workshop on Advanced LSI's and Devices, pp.12 - 15, 1999 |
| Fabrication of siliocon Quantum Dots on Oxide and Nitride Hyung-Cheol Shin, MNC(Microproceses and Nanotechnology Conference), pp.136 - 137, 1998 |
| Factors Affecting Charge-up in a Magnetically Enhanced RIE Polysilicon Etcher Hyung-Cheol Shin, Proc. Electrochemical Society, pp.405 - 406, 1993 |
| Gate Oxide Damage by Plasma Oxide Deposition and Via RIE Hyung-Cheol Shin, American Vacuum Society Plasma Etch 1992 Symposium, 1992 |
| Hg0.7Cd0.3Te 1x128 Linear Array를 이용한 열영상 시스템 구현 이희철; 신형철; 김영호; 윤난영; 배수호; 김충기, 제 7회 HgCdTe 반도체 Conference, pp.112 - 117, 1996-02-01 |
| High speed and low power SOI inverter using active body-bias Gil Joonho; Je Minkyu; Lee Jongho; Shin Hyungcheol, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, pp.59 - 63, 1998-08-10 |
| Impact of Plasma Charging Damage and Diode Protection on Scaled Thin Oxide Hyung-Cheol Shin, IEDM Technical Digest, pp.467 - 470, 1993 |
| Indium Bump의 특성 향상을 위한 새로운 열처리 방법 이희철; 신형철; 김충기; 최종화; 김영호, HgCdTe 반도체 Conference, pp.90 - 95, 1996-11-01 |
| Integrity of Gate Oxide on TFSOI Materials Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.22 - 23, 1995 |
| Lateral Silicon Field Emission Devices using Electron Beam Lithography Hyung-Cheol Shin, Micoroprocesses and Nanotechnology'99, pp.134 - 135, 1999 |
| LWIR용 HgCdTe 적외선 감지소자의 제작과 열처리에 의한 특성 향상 Hee Chul Lee; 김충기, HgCdTe 반도체 Conference, pp.99 - 103, 1996-11-01 |
| Materials, Device and Gate Oxide Integrith Evaluation of Simox and Bonded SOI Wafers Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.143 - 145, 1995 |
| MOS Image Sensor Cell Suppressed Blooming 신형철, Proc. of Conference of KITE, pp.308 - 311, 1987 |
| MOS Memory Using Si Nanocrystals Formed by Wet Etching of Poly-Silicon Along Grain Boundaries Hyung-Cheol Shin, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.221 - 224, 2000 |
| New Surface Treatment Method for Improving the Interface Characteristies of CdTe/Hg1-xCdxTe Heterostructure Lee, Hee Chul; Shin, HC; Kim, Choong Ki, The US Workshop on the PHYSICS and CHEMISTRY of II-VI MATERIAL, pp.175 - 177, 1996-10-01 |
| One-Dimensional Tansport Properties of a Gate-All-Around Silicon Quantum Wire Transistor Shin, Hyung-Cheol; Lee, Kwyro; Je, Minkyu; Han, Sangyeon; Kim, Ilgweon; Kwon, Hyukchan, 1998 IEEE Silicon Nanoelectronics Workshop, pp.21 - 22, 1998 |
| Optimization of Spiral Inductors on Siliocon Substrate 신형철, IDEC Conference 2002-Summer, pp.49 - 52, 2002 |
| Optimization of Symmetric Spiral Inductors on Siliocon Substrate 신형철, Agilent EEsof User Workshop, pp.58 - 62, 2002 |
| P-channel Nano Crystal Memory Hyung-Cheol Shin, 2000 China-Korea Joint Symposium on Semiconductor Physics and Device Application, pp.19 - 19, 2000 |
| Physical modeling of substrate resistance in RF MOSFETs Han J.; Je M.; Shin H., 2003 Nanotechnology Conference and Trade Show - Nanotech 2003, v.2, pp.290 - 293, 2003-02-23 |
| Physical Modeling of Substrate Resistance in RF MOSFETs Hyung-Cheol Shin, Workshop on Compact Modeling at the 5th International Conference on Modeling and Simulation of Microsystems, pp.335 - 338, 2003 |
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- 33,526 2020 - 2024
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- 75,675 2000 - 2009
- 44,727 1990 - 1999
- 14,360 1980 - 1989
- 62 1964 - 1969